LC86P5632 查看數據表（PDF） - SANYO -> Panasonic

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LC86P5632

8-Bit Single Chip Microcontroller with One-Time Programmable PROM

SANYO -> Panasonic 

LC86P5632 Pin description

LC86P5632

Pin name

VSS

VDD

VDDVPP

PORT0

P00 to P07

PORT1

P10 to P17

PORT2

P20 to P27

PORT3

P30 to P37

PORT4

P40 to P47

PORT5

P50 to P51

PORT7

P70

P71 to P74

I/O

Function description

Option

- Power pin (-)

-

- Power pin (+)

-

- Power pin (+)

-

I/O •8-bit input/output port

•Pull-up resistor :

•Input for port 0 interrupt

Provided/Not provided

•Input/output in nibble units

•Output form :

•Input for HOLD release

CMOS/N-channel open

drain

I/O •8-bit input/output port

Output form :

•Input/output can be specified in a bit unit

CMOS/N-channel open

•Other pin functions

drain

P10 SIO0 data output

P11 SIO0 data input/bus input/output

P12 SIO0 clock input/output

P13 SIO1 data output

P14 SIO1 data input/bus input/output

P15 SIO1 clock input/output

P16 Buzzer output

P17 Timer 1 output (PWM0 output)

I/O •8-bit input/output port

Output form :

•Input/output can be specified in a bit unit

CMOS/N-channel open

drain

I/O •8-bit input/output port

Output form :

•Input/output can be specified in a bit unit

CMOS/N-channel open

•15V withstand at N-channel open drain output

drain

I/O •8-bit input/output port

Output form :

•Input/output can be specified in a bit unit

CMOS/N-channel open

•15V withstand at N-channel open drain output

drain

I/O •2-bit input/output port

Output form :

•Input/output can be specified in a bit unit

CMOS/N-channel open

•15V withstand at N-channel open drain output

drain

•5-bit input port

•Pull-up resistor :

•Other pin functions

Provided/Not provided

P70 : INT0 input/HOLD release/N-channel Tr.

(P70,71,72,73)

output for watchdog timer

• P74 has no pull-up

I/O P71 : INT1 input/HOLD release input

P72 : INT2 input/timer 0 event input

resistor.

I P73 : INT3 input with noise filter/timer 0 event

input

P74 : 32.768kHz crystal oscillation terminal XT1

•Interrupt received forms, the vector addresses

rising

falling

rising

&

falling

high

level

low

level

vector

INT0 enable enable disable enable enable 03H

INT1 enable enable disable enable enable 0BH

INT2 enable enable enable disable disable 13H

INT3 enable enable enable disable disable 1BH

Continue.

PROM mode

-

-

Power for programming

-

Data line

D0 to D7

Address input

A7 to A0

Address input

A14 to A8 (*5)

P47 : TA (*4)

Input of PROM

control signals

DASEC (*1)

OE (*2)

CE (*3)

No.6688-9/23

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