LC866524A 查看數據表（PDF） - SANYO -> Panasonic

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LC866524A

8-Bit Single Chip Microcontroller

SANYO -> Panasonic 

LC866548/40/32/28/24A

4. Serial Input/Output Characteristics at Ta=-30°C to +70°C, VSS1=VSS2=0V

Parameter

Symbol

Pins

Cycle

Low Level

pulse width

High Level

pulse width

Cycle

Low Level

pulse width

High Level

pulse width

Data set up time

tCKCY(1)

tCKL(1)

tCKH(1)

tCKCY(2)

tCKL(2)

tCKH(2)

tICK

•SCK0

•SCK1

•SCK0

•SCK1

SI0 SI1

SB0 SB1

Data hold time tCKI

Conditions

Refer to figure 5.

VDD[V]

4.5 - 6.0

•Use pull-up

resistor (1kΩ)

when open drain

output.

•Refer to figure 5.

4.5 - 6.0

•Data set-up to

SCK0, 1.

•Data hold from

SCK0, 1.

•Refer to figure 5.

4.5 - 6.0

Ratings

min. typ. max.

2

1

1

2

1/2tCKCY

1/2tCKCY

0.1

0.1

unit

tCYC

µs

Output delay

time

(Serial clock is

external clock)

Output delay

time

(Serial clock is

internal clock)

tCKO(1)

tCKO(2)

SO0 SO1

SB0 SB1

•Use pull-up

resistor (1kΩ)

when open drain

output.

•Data hold from

SCK0, 1

•Refer to figure 5.

4.5 - 6.0

7/12tCYC

+0.2

1/3tCYC

+0.2

5. Pulse Input Conditions at Ta=-30°C to +70°C, VSS1=VSS2=0V

Parameter Symbol

Pins

High/low level

pulse width

tPIH(1)

tPIL(1)

tPIH(2)

tPIL(2)

tPIH(3)

tPIL(3)

tPIH(4)

tPIL(4)

tPIL(5)

•INT0, INT1

•INT2/T0IN

INT3/T0IN

(The noise

rejection clock is

select to 1/1.)

INT3/T0IN

(The noise

rejection clock is

select to 1/16.)

INT3/T0IN

(The noise

rejection clock is

select to 1/64.)

RES

Conditions

•Interrupt acceptable

•Timer0-countable

•Interrupt acceptable

•Timer0-countable

•Interrupt acceptable

•Timer0-countable

•Interrupt acceptable

•Timer0-countable

Reset acceptable

VDD[V]

4.5 - 6.0

Ratings

min. typ. max.

1

4.5 - 6.0 2

4.5 - 6.0 32

4.5 - 6.0 128

4.5 - 6.0 200

unit

tCYC

µs

No.6700-15/21

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