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PIC16C712

8-Bit CMOS Microcontrollers with A/D Converter and Capture/Compare/PWM

Microchip Technology 

PIC16C712/716

3.0 I/O PORTS

Some pins for these I/O ports are multiplexed with an

alternate function for the peripheral features on the

device. In general, when a peripheral is enabled, that

pin may not be used as a general purpose I/O pin.

Additional information on I/O ports may be found in the

PICmicro™ Mid-Range Reference Manual,

(DS33023).

3.1 PORTA and the TRISA Register

PORTA is a 5-bit wide bi-directional port. The corre-

sponding data direction register is TRISA. Setting a

TRISA bit (=1) will make the corresponding PORTA pin

an input, (i.e., put the corresponding output driver in a

hi-impedance mode). Clearing a TRISA bit (=0) will

make the corresponding PORTA pin an output, (i.e., put

the contents of the output latch on the selected pin).

Reading the PORTA register reads the status of the

pins whereas writing to it will write to the port latch. All

write operations are read-modify-write operations.

Therefore a write to a port implies that the port pins are

read, the value is modified, and then written to the port

data latch.

FIGURE 3-1: BLOCK DIAGRAM OF RA3:RA0

DATA

BUS

WR

PORT

WR

TRIS

D

Q

CK Q

Data Latch

D

Q

CK Q

TRIS Latch

Pin RA4 is multiplexed with the Timer0 module clock

input to become the RA4/T0CKI pin. The RA4/T0CKI

pin is a Schmitt Trigger input and an open drain output.

All other RA port pins have TTL input levels and full

CMOS output drivers.

PORTA pins, RA3:0, are multiplexed with analog inputs

and analog VREF input. The operation of each pin is

selected by clearing/setting the control bits in the

ADCON1 register (A/D Control Register1).

Note: On a Power-on Reset, these pins are con-

figured as analog inputs and read as '0'.

The TRISA register controls the direction of the RA

pins, even when they are being used as analog inputs.

The user must ensure the bits in the TRISA register are

maintained set when using them as analog inputs.

EXAMPLE 3-1: INITIALIZING PORTA

BCF STATUS, RP0 ;

CLRF PORTA

; Initialize PORTA by

; clearing output

; data latches

BSF STATUS, RP0 ; Select Bank 1

MOVLW 0xEF

; Value used to

; initialize data

; direction

MOVWF TRISA

; Set RA<3:0> as inputs

; RA<4> as outputs

BCF STATUS, RP0 ; Return to Bank 0

VDD

P

VDD

N

I/O pin

VSS VSS

Analog

input

mode

RD TRIS

Q

D

TTL

Input

Buffer

EN

RD PORT

To A/D Converter

© 1998 Microchip Technology Inc.

Preliminary

DS41106A-page 21

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