SPT9110 查看數據表（PDF） - Signal Processing Technologies
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SPT9110 Datasheet PDF : 11 Pages
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ABSOLUTE MAXIMUM RATING (Beyond which damage may occur)1
Supply Voltages
Output Currents2
AVCC Supplies ............................................. -0.5 to +6 V
Continuous Output Current ................................. ±15 mA
Input Voltages
Temperature
Analog Input Voltage .................................... -0.5 to +6 V
Operating Temperature .............................. -40 to +85 °C
CLK, NCLK Input .......................................... -0.5 to +6 V
Junction Temperature ......................................... +150 °C
Ref In ............................................................ -0.5 to +6 V
Lead, Soldering (10 seconds) ............................. +220 °C
Storage ..................................................... -65 to +150 °C
Note 1: Operation at any Absolute Maximum Ratings is not implied. See Electrical Specifications for proper nominal
applied conditions in typical application.
Note 2: Outputs are short circuit protected.
ELECTRICAL SPECIFICATIONS
AVCC = +5.0 V, AGND = 0.0 V, Output Load = 1 kΩ and 10 pF, VIN = 2.0 Vp-p,Internal Reference, unless otherwise specified.
PARAMETERS
TEST
CONDITIONS
TEST
LEVEL
SPT9110
MIN
TYP
DC Performance
Gain ∆VIN = 2.0 Vp-p
Single Ended Out
+25 °C
I
0.95
0.97
Full Temperature
V
0.96
Differential Out
+25 °C
I
1.80
1.93
Full Temperature
V
1.92
Offset VIN = +2.5 V
Out+
+25 °C
I
-100
±50
Differential1
Full Temperature
V
+25 °C, Ref In=Out+ CM
I
55
-15
±5
Full Temperature
V
10
Output Drive Capacity2
Full Temperature
IV
±1
Output Load at 10 pF
Full Temperature
V
1
Analog Input/Output
Output Voltage Range
Input Capacitance
Input Resistance
Reference Voltage Output
Reference Output Current3
Reference Voltage Tempco
Full Temperature
+25 °C
+25 °C
+25 °C
Full Temperature
VI
1.5
V
5
I
100
140
I
2.35
2.45
V
±100
V
75
Clock Inputs
Input Type/Logic Family
Input Bias Current
Input Low Voltage (Differential)
Input High Voltage (differential)
+25 °C
+25 °C
+25 °C
V
Differential PECL
I
2
I
3.3
I
3.9
4.1
MAX
0.99
2.00
+100
±15
±10
3.5
2.55
10
3.5
UNITS
V/V
V/V
V/V
V/V
mV
mV
mV
mV
mA
kΩ
V
pF
kΩ
V
µA
ppm/°C
µA
V
V
1Differential offset is specified with Ref In equal to the common mode output voltage of OUT+ and so includes the offset error of the
inverter only.
2This part is intended to drive a high impedance load. AC performance is degraded at ±10 mA. See the Typical Performance Graphs.
3Ref Out has a typical output impedance of 1 kΩ and should be buffered for driving loads other than Ref In.
SPT
2
SPT9110
11/12/98
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