MC80287 查看數據表（PDF） - Intel
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MC80287 Datasheet PDF : 24 Pages
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M80287
A C CHARACTERISTICS (Over Specified Operating Conditions)
TIMING REQUIREMENTS
A C timings are referenced to 0 8V and 2 0V points on signals unless otherwise noted
Symbol
Parameter
6 MHz
8 MHz
10 MHz
Unit Comments
-6 Min -6 Max -8 Min -8 Max -10 Min -10 Max
TCLCL
CLK Period
CKM e 1
CKM e 0
165 500 125 500 100
62 5 166 50 166 40
500 ns
166 ns
TCLCH
CLK LOW Time
CKM e 1
CKM e 0
100 343 68 343 53
15 146 15 146 11
343 ns At 0 8V
146 ns At 0 6V
TCHCL
CLK HIGH Time
CKM e 1
CKM e 0
50 230 43 230 28
20 151 20 151 18
230 ns At 2 0V
151 ns At 3 6V
TCH1CH2 CLK Rise Time
10
10
10 ns 1 0V to 3 6V
if CKM e 1
TCL2CL1 CLK Fall Time
10
10
10 ns 3 6V to 1 0V
if CKM e 1
TDVWH Data Setup to NPWR Inactive 75
75
75
TWHDX Data Hold from NPWR Inactive 30
18
18
TWLWH NPWR NPRD Active Time
95
90
90
TRLRH
TAVRL Command Valid to NPWR or
0
0
0
TAVWL NPRD Active
TMHRL Minimum Delay from PEREQ 130
130
100
Active to NPRD Active
ns
ns
ns At 0 8V
ns
ns
TKLKH PEAK Active Time
85
85
60
TKHKL PEAK Inactive Time
250
250
200
TKHCH PEAK Inactive to NPWR
50
40
40
NPRD Inactive
ns At 0 8V
ns At 2 0V
ns
TCHKL NPWR NPRD Inactive to
b30
b30
b30
ns
PEAK Inactive
TWHAX Command Hold from NPWR
30
30
22
ns
TRHAX NPRD Inactive
TKLCL PEAK Active Setup to NPWR 50
40
40
ns
NPRD Active
TIVCL NPWR NPRD RESET
70
70
53
ns
to CLK Setup Time
TCLIH NPWR NPRD RESET
45
45
37
ns
from CLK Hold Time
TRSCL RESET to CLK Setup Time
20
20
20
ns
TCLRS RESET from CLK Hold Time
20
20
20
ns
NOTE
Tja e 41 C W
Tjc e 14 C W
5
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