PST575 查看數據表（PDF） - Mitsumi

零件编号

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比赛名单

PST575

System Reset Monolithic IC

Mitsumi 

MITSUMI

Timing Chart

7

6

5

4

VCC/VOUT

(V)

3

2

1

0

RESET

ON

VCC

VOUT

Variable

OFF

Time

System Reset PST575

VS

Undefined

Application Circuits (Pin numbers are for an example of MMP-4P.)

1. Normal hard reset

Delay time (tPLH)

=··1.3Cd Rd+0.007 (mS)

Cd : µF Rd : kΩ

Note: Connect a capacitor between IC pins 1 and 2 if

VCC line impedance is high.

2. Manual reset added

Note: Use RL, CL and Rm to prevent manual switch

chattering. Connect a capacitor between IC

pins 1 and 2 if VCC line impedance is high.

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