PT2318 查看數據表（PDF） - Princeton Technology

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PT2318

Sound Fader Controller IC

Princeton Technology 

Sound Fader Controller IC

INTERFACE PROTOCOL

The interface protocol consists of the following:

1. START Condition

2. Chip Address Byte=80H

3. ACK=Acknowledge Bit

4. Data Byte

5. STOP Condition

Please refer to the diagram below:

MSB First Byte

LSB

START 1 0 0 0 1 0 0 0

Chip Address

Subaddress

Tel: 886-2-66296288

Fax: 886-2-29174598

URL: http://www.princeton.com.tw

PT2318

ACK Data Byte ACK STOP

Notes:

1. ACK=ACKNOWLEDGE

2. Max. Clock Speed=100K Bits/S

The SUBADDRESS is the Second Byte transmitted following the CHIP ADDRESS Byte. Please refer

to the table below.

MSB

LSB Function

7 6 5 4 3 2* 1* 0*

0 0 0 0 0 0 0 0 Volume/Loudness

0 0 0 0 0 0 0 1 Fader: Front, Right

0 0 0 0 0 0 1 0 Fader: Front, Left

0 0 0 0 0 0 1 1 Fader: Rear, Right

0 0 0 0 0 1 0 0 Fader: Rear, Left

0 0 0 0 0 1 0 1 Bass

0 0 0 0 0 1 1 0 Treble

0 0 0 0 0 1 1 1 Selector Switch

Note: These are Significant SUBADDRESS bits.

The last bits of SUBADDRESS are named “specific bit”. When more than one data bit send to PT2318,

the SUBADDRESS will increase automatically depend on specific bit. It is unnecessary to send to

SUBADDRESS, data bit will fill in SUBADDRESS bit. Please refer to following table.

START

Chip

Address

Start 80H

ACK

Sub

Address

ACK

00H

Data

Byte

Corresp

onding

Sub

Address

00H

ACK

Data

Byte

Corresp

onding

Sub

Address

01H

ACK

Data

Byte

Corresp

onding

Sub

Address

02H

ACK

Data

Byte

Correspo

nding

Sub

Address

03H

ACK STOP

End

PT2318 V1.2

-7-

March, 2006

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