RT8059 查看數據表（PDF） - Richtek Technology
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RT8059 Datasheet PDF : 10 Pages
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RT8059
The maximum power dissipation depends on the operating
ambient temperature for fixed TJ(MAX) and thermal
resistance, θJA. For the RT8059 package, the derating
curves in Figure 2 allow the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
0.42
Single-Layer PCB
0.39
0.36
0.33
0.30
0.27
0.24
0.21
0.18
0.15
0.12
0.09
0.06
0.03
0.00
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 2. Derating Curves for RT8059 Package
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of the RT8059.
` Keep the trace of the main current paths as short and
wide as possible.
` Place the input capacitor as close as possible to the
device pins (VIN and GND).
` LX node experiences high frequency voltage swings
and should be kept in a small area. Keep analog
components away from the LX node to prevent stray
capacitive noise pick-up.
` Place the feedback components as close as possible to
the FB pin.
` GND and Exposed Pad must be connected to a strong
ground plane for heat sinking and noise protection.
VIN
GND
CIN
COUT
VOUT
L
VIN 4 3 LX
C1
FB 5
R1 R2
VOUT
2 GND
1 EN
GND
Figure 3. PCB Layout Guide
Copyright ©2011 Richtek Technology Corporation. All rights reserved.
DS8059-04 December 2011
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
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