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RT9527 查看數據表(PDF) - Richtek Technology

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RT9527 Datasheet PDF : 14 Pages
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RT9527
Battery Connect Reverse
If battery is connected reversely, it causes that the voltage
of BAT pin is negative. RT9527 will disable charger function
until battery voltage is normal.
Temperature Regulation
In order to maximize charge rate, the RT9527 features a
junction temperature regulation loop. If the power
dissipation of the IC results in junction temperature greater
than the thermal regulation threshold (125°C), the RT9527
will cut back on the charge current and disconnect the
battery in order to maintain thermal regulation at around
125°C. This operation continues until the junction
temperature falls below the thermal regulation threshold
(125°C) by the hysteresis level. This feature prevents the
maximum power dissipation from exceeding typical design
conditions.
Sleep mode
The RT9527 enters sleep mode if both the AC and USB
ports are removed from the input. This feature prevents
draining the battery during the absence of an input supply.
Battery Pack Temperature Monitoring
The RT9527 features an external battery pack temperature
monitoring input. The TS input connects to the NTC
thermistor in the battery pack to monitor battery
temperature and prevent danger over temperature
conditions. If at any time the voltage at TS falls outside of
the operating range, charging will be suspended. The
timers maintain their values but suspend counting. When
charging is suspended due to a battery pack temperature
fault, the CHG pin remains low and continues to indicate
charging.
VIN
Too Cold +
NTC_fault
-
+
Too Hot
-
RT1
TS
RNTC RT2
R T2
=
310RTCRTH
117RTC 427RTH
R T1
=
7RTHRT2
3RTH RT2
Time Fault
The Fast-Charge Fault Time is set according to the following
equations :
Fast-Charge Fault Time : tFCHG = 14400 x CTIMER (s)
Pre-Charge Fault Time : tPCHG = 1 / 8 x tFCHG (s)
where the CTIMER unit is in μF.
When time fault happens, the charger cycle will be turned
off and the CHG pin will become high impedance.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
WDFN-8L 2x2 package, the thermal resistance, θJA, is
120°C/W on a standard JEDEC 51-7 four-layer thermal
test board. The maximum power dissipation at TA = 25°C
can be calculated by the following formula :
PD(MAX) = (125°C 25°C) / (120°C/W) = 0.833W for
WDFN-8L 2x2 package
The maximum power dissipation depends on the operating
ambient temperature for fixed TJ(MAX) and thermal
resistance, θJA. The derating curve in Figure 1 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
Copyright ©2014 Richtek Technology Corporation. All rights reserved.
DS9527-02 May 2014
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
11

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