Philips Semiconductors
Digital equalization for the tape
drive processing of the DCC system
SYMBOL
TEST8
TEST9
TEST10
f24
VAL
PIN
DESCRIPTION
40
test 8 input; to be connected to VSS
41
test 9 input; to be connected to VSS
42
test 10 input; to be connected to VSS
43
clock input; typical frequency 24.576 MHz (CMOS input)
44
synchronization output for DIGEYE
Product specification
SAA2032
DIGEYE 1
RDSYNC 2
RDCLK 3
TEST1 4
VIN 5
REFN 6
REFP 7
VSSA 8
BIASA 9
VSSAD 10
VDDAD 11
SAA2032
33 LTCNT1
32 LTENDEQ
31 LTDATA
30 AUX
29 CH7
28 CH6
27 CH5
26 CH4
25 CH3
24 CH2
23 CH1
MEA661
Fig.2 Pin configuration.
February 1995
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