SAA5250P 查看數據表（PDF） - Philips Electronics

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SAA5250P

Interface for data acquisition and control (for multi-standard teletext systems)

Philips Electronics 

Philips Semiconductors

Interface for data acquisition and control

(for multi-standard teletext systems)

Product specification

SAA5250

PINNING FUNCTION

MNEMONIC

A10 and

A0 to A9

VAL OUT

VAL IN/SYNC

CBB

DCK

SD

MS

WE

DB7 to DB0

ALE

CE

WR

VSS

RD

D0 to D7

VDD

PIN NO. FUNCTION

1 and

30 to 39

2

3

4

Memory address outputs used by CIDAC to address a 2 K byte buffer memory

Validation output signal used to control the location of the window for the framing code.

Validation input signal (line signal) used to give or calculate a window for the framing

code detection

Colour burst blanking output signal used by the SAA5230 as a data slicer reset pulse

5

Data clock input, in synchronization with the serial data signal

6

Serial data input, arriving from the demodulator

7

Chip enable output signal for buffer memory selection

8

Write command output for the buffer memory

9 to 16

17

18

19

8-bit three state input/output data/address bus used to transfer commands, data and

status between the CIDAC registers and the CPU

Demultiplexing input signal for the CPU data bus

Chip enable input for the SAA5250

Write command input (when LOW)

20

21

22 to 29

40

ground

Read command input (when LOW)

8-bit three state input/output data bus used to transfer data between CIDAC and the

buffer memory

+5 V power supply

January 1987

5

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