SAA7130 查看數據表（PDF） - Philips Electronics

零件编号

产品描述 (功能)

比赛名单

SAA7130

PCI video broadcast decoder

Philips Electronics 

Philips Semiconductors

SAA7130HL

PCI video broadcast decoder

Table 9:

Symbol

GPIO16

GPIO pins and functions…continued [1]

Pin

Type Function

Audio and

video port

outputs

68

GIO

-

GPIO15 to

GPIO8

69 to 72 GIO

and

75 to 78

GPIO7 to

GPIO0

79 to 86 GIO

VP[7:0] for

formats:

ITU-R BT.656,

VMI, VIP (1.1,

2.0), etc.

VP extension

for 16-bit

formats: ZV,

VIP-2, DMSD,

etc.

TS capture

inputs

TS_VAL (valid

flag)

-

TS_P_D[7:0]

(byte-parallel

data)

Raw DTV/DVB GPIO

outputs

-

ADC_Y[8:1]

R/W,

INT

R/W

ADC_C[8:1]

R/W

[1] The SAA7130HL offers a peripheral interface with General Purpose Input/Output (GPIO) pins. Dedicated

functions can be selected:

a) Digital Video Port (VP): output only; in 8-bit and 16-bit formats, such as VMI, DMSD (ITU-R BT.601);

zoom-video, with discrete sync signals; ITU-R BT.656; VIP (1.1 and 2.0), with sync encoded in SAV and

EAV codes.

b) Transport Stream (TS) capture input: from the peripheral DTV/DVB channel decoder; synchronized by

Start Of Packet (SOP); in byte-parallel or bit-serial protocol.

c) Digitized raw DTV/DVB samples stream output: from internal ADCs; to feed the peripheral DTV/DVB

channel decoder.

d) GPIO: as default (no other function selected); static (no clock); read and write from or to individually

selectable pins; latching ‘strap’ information at system reset time.

e) Use an external pull-up resistor of 4.7 kΩ at GPIO16 for an external 24.576 MHz crystal; due to an

internal pull-down resistor an open GPIO16 pin requires an external 32.11 MHz crystal.

f) Peripheral interrupt (INT) input: enabled by interrupt enable register; routed to PCI interrupt (INT_A).

5.2.1 Pin type description

SAA7130HL_4

Product data sheet

Table 10: Characteristics of pin types and remarks

Pin type

Description

AG

analog ground

AI

analog input; video, audio and sound

AO

analog output

AR

analog reference support pin

AS

analog supply voltage (3.3 V)

CI

CMOS input; 3.3 V level (not 5 V tolerant)

CO

CMOS output; 3.3 V level (not 5 V tolerant)

GIO

digital input/output (GPIO); 3.3 V level (5 V tolerant)

GO

digital output (GPIO); 3.3 V level (5 V tolerant)

I

JTAG test input

IO2

digital input and output of the I2C-bus interface; 3.3 V and 5 V

compatible, auto-adapting

O

JTAG test output

O/D

open-drain output (for PCI-bus); multiple clients can drive LOW at the

same time, wired-OR, floating back to 3-state over several clock cycles

Rev. 04 — 11 April 2006

© Koninklijke Philips Electronics N.V. 2006. All rights reserved.

11 of 46

Share Link: