Q67101-H6788 查看數據表（PDF） - Siemens AG

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Q67101-H6788

ICs for Communications Enhanced Serial Communication Controller

Siemens AG 

Enhanced Serial Communication Controller

ESCC2

SAB 82532

SAF 82532

1.1 Features

CMOS IC

Serial Interface

• Two independent full duplex serial channels

– On chip clock generation or external clock source

– On chip DPLL for clock recovery of each channel

– Two independent baud rate generators

– Independent time-slot assignment for each

P-LCC-68

channel with programmable time-slot length

(1 … 256 bits)

• Async, sync character oriented

(MONOSYNC/BISYNC) or HDLC/SDLC modes

(including SDLC LOOP)

• Transparent receive/transmit of data bytes without

framing

• NRZ, NRZI, FM and Manchester encoding

• Modem control lines (RTS, CTS, CD)

• CRC support:

P-MQFP-80-1

– HDLC/SDLC: CRC-CCITT or CRC-32 (automatic

handling for transmit/receive direction)

– BISYNC: CRC-16 or CRC-CCITT (support for transmit direction)

Type

SAB 82532 N

SAB 82532 N-10

SAB 82532 H

SAB 82532 H-10

SAF 82532 N-10

SAF 82532 H-10

Ordering Code

Q67101-H6790

Q67101-H6791

Q67101-H6788

Q67101-H6789

on request

on request

Package

P-LCC-68

P-LCC-68

P-MQFP-80

P-MQFP-80

P-LCC-68

P-MQFP-80

Max. Data Rate

Time Slot

Mode

ext.

int. (DPLL)

clocked

2.048 Mbit/s 2 Mbit/s no

10 Mbit/s

2 Mbit/s yes

2.048 Mbit/s 2 Mbit/s no

10 Mbit/s

2 Mbit/s yes

10 Mbit/s

2 Mbit/s yes

10 Mbit/s

2 Mbit/s yes

Semiconductor Group

7

07.96

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