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SAF-XC822-1FRI 查看數據表(PDF) - Infineon Technologies

零件编号
产品描述 (功能)
比赛名单
SAF-XC822-1FRI
Infineon
Infineon Technologies Infineon
SAF-XC822-1FRI Datasheet PDF : 52 Pages
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XC822/824
Electrical Parameters
Table 8
Input/Output Characteristics of XC822/XC824 (Operating Conditions
apply) (cont’d)
Parameter
Symbol
Limit Values Unit Test Conditions
Min. Max.
Pull-down current on IPDP CC –
20
port pins
150 –
μA VIL,max (5 V)
μA VIH,min (5 V)
5
μA VIL,max (3.3 V)
100 –
μA VIH,min (3.3 V)
Input leakage current IOZP CC -1
1
on port pins2)
Overload current on IOVP SR -5
5
any pin
μA 0 < VIN < VDDP,
TA 125 °C
mA 3)
Absolute sum of
overload currents
Σ|IOV| SR –
25
mA 3)
Voltage on any pin VPO
during VDDP power off
SR –
0.3
V
4)
Maximum current per IM
pin (excluding VDDP
and VSS)
SR -15 25
mA –
Maximum current
into VDDP
IMVDDP SR –
80
mA 3)
Maximum current out IMVSS SR –
of VSS
80
mA 3)
1) Not subjected to production test, verified by design/characterization. Hysteresis is implemented to avoid meta
stable states and switching due to internal ground bounce. It cannot be guaranteed that it suppresses switching
due to external system noise.
2) An additional error current (IINJ) will flow if an overload current flows through an adjacent pin.
3) Not subjected to production test, verified by design/characterization.
4) Not subjected to production test, verified by design/characterization. However, for applications with strict low
power-down current requirements, it is mandatory that no active voltage source is supplied at any GPIO pin
when VDDP is powered off.
Data Sheet
24
V1.2, 2011-10

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