SAF-XC864L-1FRI3V3 查看數據表（PDF） - Infineon Technologies

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SAF-XC864L-1FRI3V3

8-Bit Single-Chip Microcontroller

Infineon Technologies 

XC864

General Device Information

2.3

Pin Configuration

The pin configuration of the XC864, which is based on the PG-TSSOP-20 package, is

shown in Figure 4. Every package pin is bonded to an input port pin or a bidirectional

port pin except Pin 15. It is bonded to 2 bidirectional port pins namely, P1.0 and P1.1.

Configurations of both port pins to output direction concurrently must be avoided to

prevent permanent damage to the chip1).

In addition, open drain output mode with pull-up device enabled is recommended for

P1.1 as TXD function and input mode for P1.0 as RXD function in single wire UART

communication.

P0.5/MRST_1/EXINT0_0/COUT62_1 1

20 P0.4/MTSR_1/CC62_1

VSSC 2

VDDC 3

TMS 4

19 P0.3/SCK_1/COUT63_1

18 RESET

17 P3.1/CCPOS0_2/CC61_2/COUT60_0

P0.0/TCK_0/T12HR_1/CC61_1/CLKOUT/RXDO_1 5

P0.2/CTRAP_2/TDO_0/TXD_1 6

P0.1/TDI_0/T13HR_1/RXD_1/EXF2_1/COUT61_1 7

16 P3.0/CC60_0/CCPOS1_2

XC864

15

P1.0/RXD_0/T2EX/

P1.1/EXINT3/TDO_1/TXD_0/T0

14 P2.7/AN7

P2.0/CCPOS0_0/EXINT1/T12HR_2/TCK_1/CC61_3/AN0 8

P2.1/CCPOS1_0/EXINT2/T13HR_2/TDI_1/CC62_3/AN1 9

P2.2/CCPOS2_0/CTRAP_1/CC60_3/AN2 10

13 VAREF

12 VAGND/VSSP

11 VDDP

Figure 4 XC864 Pin Configuration, PG-TSSOP-20 Package (top view)

1) Protection against improper usage of P1.0 and P1.1 is not available in XC864.

Data Sheet

6

V 1.1, 2009-03

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