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SCC2681T 查看數據表(PDF) - Philips Electronics

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SCC2681T Datasheet PDF : 15 Pages
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Philips Semiconductors
Dual asynchronous receiver/transmitter (DUART)
Product data
SCC2681T
DESCRIPTION
The Philips Semiconductors SCC2681 Dual Universal
Asynchronous Receiver/Transmitter (DUART) is a single-chip
MOS-LSI communications device that provides two independent
full-duplex asynchronous receiver/transmitter channels in a single
package. The SCC2681T features a faster bus cycle time than the
standard SCC2681. The quick bus cycle eliminates or reduces the
need for wait states with fast CPUs and permits high throughput in
I/O intensive systems. Higher external clock rates may be used with
the transmitter, receiver and counter timer which in turn provide
greater versatility in baud rate generation. The SCC2681T interfaces
directly with microprocessors and may be used in a polled or
interrupt driven system. It is manufactured in CMOS technology.
The operating mode and data format of each channel can be
programmed independently. Additionally, each receiver and
transmitter can select its operating speed as one of eighteen fixed
baud rates, a 16× clock derived from a programmable counter/timer,
or an external 1× or 16× clock. The baud rate generator and
counter/timer can operate directly from a crystal or from external
clock inputs. The ability to independently program the operating
speed of the receiver and transmitter make the DUART particularly
attractive for dual-speed channel applications such as clustered
terminal systems.
Each receiver is quadruple buffered to minimize the potential of
receiver over-run or to reduce interrupt overhead in interrupt driven
systems. In addition, a flow control capability is provided to disable a
remote DUART transmitter when the receiver buffer is full.
Also provided on the SCC2681T are a multipurpose 7-bit input port
and a multipurpose 8-bit output port. These can be used as general
purpose I/O ports or can be assigned specific functions (such as
clock inputs or status/interrupt outputs) under program control.
For a complete functional description and programming information
for the SCC2681T, refer to the SCC2681 product specification.
FEATURES
Fast bus cycle times reduce or eliminate CPU wait states
Dual full-duplex asynchronous receiver/transmitters
Quadruple buffered receiver data registers
Programmable data format
5 to 8 data bits plus parity
Odd, even, no parity or force parity
1, 1.5 or 2 stop bits programmable in 1/16-bit increments
16-bit programmable Counter/Timer
Programmable baud rate for each receiver and transmitter
selectable from:
22 fixed rates: 50 to 115.2 k baud
Non-standard rates to 115.2
Non-standard user-defined rate derived from programmable
counter/timer
External 1× or 16× clock
Parity, framing, and overrun error detection
False start bit detection
Line break detection and generation
Programmable channel mode
Normal (full-duplex)
Automatic echo
Local loopback
Remote loopback
Multi-function programmable 16-bit counter/timer
Multi-function 7-bit input port
Can serve as clock or control inputs
Change of state detection on four inputs
100 ktypical pull-up resistors
Multi-function 8-bit output port
Individual bit set/reset capability
Outputs can be programmed to be status/interrupt/DMA signals
Auto 485 turn-around
Versatile interrupt system
Single interrupt output with eight maskable interrupting
conditions
Output port can be configured to provide a total of up to six
separate wire-ORable interrupt outputs
Maximum data transfer rates:
1× – 1 MB/sec transmitter and receiver
16× – 500 kB/sec receiver and 250 kB/sec transmitter
Automatic wake-up mode for multidrop applications
Start-end break interrupt/status
Detects break which originates in the middle of a character
On-chip crystal oscillator
Single +5 V power supply
Commercial temperature range
ORDERING INFORMATION
DESCRIPTION
44-Pin Plastic Lead Chip Carrier (PLCC)
VCC = +5 V ± 10%, Tamb = 0 °C to +70 °C
SCC2681TC1A44
NOTE: For a full register description and programming information see the SCC2681.
DWG #
SOT187-2
2004 Apr 06
2

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