SFR9230B 查看數據表（PDF） - Fairchild Semiconductor
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SFR9230B Datasheet PDF : 9 Pages
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SFR9230B / SFU9230B
200V P-Channel MOSFET
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switching DC/DC converters.
Features
• -5.4A, -200V, RDS(on) = 0.8Ω @VGS = -10 V
• Low gate charge ( typical 33 nC)
• Low Crss ( typical 45 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
S
D
!
GS
D-PAK
SFR Series
GDS
I-PAK
SFU Series
G!
●
●
▶▲
●
!
D
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
SFR9230B / SFU9230B
-200
-5.4
-3.4
-22
± 30
390
-5.4
4.9
-5.5
2.5
49
0.39
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Thermal Characteristics
Symbol
Parameter
RθJC
Thermal Resistance, Junction-to-Case
RθJA
Thermal Resistance, Junction-to-Ambient *
RθJA
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
Typ
Max
Units
--
2.55
°C/W
--
50
°C/W
--
110
°C/W
©2002 Fairchild Semiconductor Corporation
Rev. B, December 2002
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