SM8761 查看數據表（PDF） - Nippon Precision Circuits
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SM8761 Datasheet PDF : 11 Pages
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SM8761 series
FUNCTIONAL DESCRIPTION
Master Clock
The SM8761 series master clock can be generated by the crystal oscillator formed by connecting a crystal
between XT (pin 1) and XTN (pin 8) as shown in Figure 2. Alternatively, an external master clock can be input
directly on XT (pin 1) as shown in Figure 3. If an external clock is input on XT, it is recommended that the
clock have 50% duty and VDD level voltage amplitude. Note that the input clock amplitude voltage must not
exceed the absolute maximum rating, otherwise it may cause the SM8761 series to breakdown.
C1
XT (Pin1)
Oscillator
C2
XTN (Pin8)
C1, C2 = 5 to 33pF
Internal
Circuits
Figure 2. Crystal element connection
External Clock
Open
XT (Pin1)
Oscillator
XTN (Pin8)
Internal
Circuits
Figure 3. External clock input
NIPPON PRECISION CIRCUITS INC.—7
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