UT62L64CSC-70 查看數據表（PDF） - Utron Technology Inc

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UT62L64CSC-70

8K X 8 BIT LOW POWER CMOS SRAM

Utron Technology Inc 



UTRON

Rev. 1.4

REVISION HISTORY

UT6264C

8K X 8 BIT LOW POWER CMOS SRAM

REVISION

Preliminary Rev. 0.1

Rev. 1.0

Rev. 1.1

Rev. 1.2

Rev. 1.3

Rev. 1.4

DESCRIPTION

Original.

Revised

- The timeing waveforms add CE2 control pin

Revised

- Package outline dimension

- Waveform.

Revised

- Improve IDR from 20µA to 10µA (LL-version , max.)

- 28-pin PDIP package outline dimension

1. Add Extended temperature : -20℃~85℃

2. Revised Operating : 45/30 mA (typ.) 40/30 mA (typ.)

3. Revised CMOS Standby : 2 0.3mA (typ.) normal

4. Revised DC characteristics :

a. Icc(-35) : 45 40mA (typ.), 60 50 mA (max)

b. Icc(-70) : 45 40mA (max.)

c. Icc1(Tcycle=1us)= 10mA(max.)

d. Icc2(Tcycle=500ns)=20mA(max.)

5. Revised “Order information” : add Extended parts

Add order information for lead free product

Date

May 3 ,2001

Jun.4,2001

Jan 15,2002

May 14,2002

Jul 30,2002

May 15,2003

UTRON TECHNOLOGY INC.

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

TEL: 886-3-5777882 FAX: 886-3-5777919

1

P80028

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