CMOS SyncBiFIFOTM
64 x 36 x 2
IDT723612
FEATURES:
• Free-running CLKA and CLKB can be asynchronous or
coincident (simultaneous reading and writing of data on a
single clock edge is permitted)
• Two independent clocked FIFOs (64 x 36 storage capacity
each) buffering data in opposite directions
• Mailbox bypass Register for each FIFO
• Programmable Almost-Full and Almost-Empty Flags
• Microprocessor interface control logic
• EFA, FFA, AEA, and AFA flags synchronized by CLKA
• EFB, FFB, AEB, and AFB flags synchronized by CLKB
• Passive parity checking on each port
• Parity generation can be selected for each port
FUNCTIONAL BLOCK DIAGRAM
CLKA
CSA
W/RA
ENA
MBA
Port-A
Control
Logic
• Supports clock frequencies up to 67 MHz
• Fast access times of 10ns
• Available in 132-pin plastic quad flat package (PQF) or space-
saving 120-pin thin quad flat package (TQFP)
• Industrial temperature range (–40°C to +85°C) is available
DESCRIPTION:
The IDT723612 is a monolithic high-speed, low-power CMOS bi-directional
clocked FIFO memory. It supports clock frequencies up to 67 MHz and has read
access times as fast as 10ns. Two independent 64 x 36 dual-port SRAM FIFOs
on board the chip buffer data in opposite directions. Each FIFO has flags to
indicate empty and full conditions and two programmable flags (Almost-Full and
Almost-Empty) to indicate when a selected number of words is stored in
Mail 1
Register
Parity
Gen/Check
MBF1
PEFB
PGB
RST
ODD/
EVEN
Device
Control
FFA
AFA
36
FS0
FS1
A0 - A35
EFA
AEA
RAM
ARRAY
64 x 36
Write Read
Pointer Pointer
FIFO1
Status Flag
Logic
FIFO2
Programmable Flag
Offset Register
Status Flag
Logic
Read Write
Pointer Pointer
36
EFB
AEB
B0 - B36
FFB
AFB
36
RAM
ARRAY
64 x 36
PGA
PEFA
MBF2
Parity
Gen/Check
Mail 2
Register
Port-B
Control
Logic
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. SyncBiFIFO is a trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
1
© 2002 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
CLKB
CSB
W/RB
ENB
MBB
3136 drw01
MARCH 2002
DSC-3136/1