SST89E54RDA(2011) 查看數據表（PDF） - Silicon Storage Technology
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SST89E54RDA Datasheet PDF : 91 Pages
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A Microchip Technology Company
FlashFlex MCU
SST89E54RD2A/RDA / SST89E58RD2A/RDA
Not Recommended for New Designs
@DPTR generates a 16-bit address. This allows external addressing up the 64K. Port 2 provides the
high-order eight address bits (DPH), and Port 0 multiplexes the low order eight address bits (DPL) with
data. Both MOVX @Ri and MOVX @DPTR generates the necessary read and write signals (P3.6 -
WR# and P3.7 - RD#) for external memory use. Table 4 shows external data memory RD#, WR# oper-
ation with EXTRAM bit.
The stack pointer (SP) can be located anywhere within the 256 bytes of internal RAM (lower 128 bytes
and upper 128 bytes). The stack pointer may not be located in any part of the expanded RAM.
Table 4: External Data Memory RD#, WR# with EXTRAM bit
MOVX @DPTR, A or MOVX A, @DPTR
MOVX @Ri, A or MOVX A, @Ri
AUXR
EXTRAM = 0
ADDR < 0300H
RD# / WR# not asserted
ADDR >= 0300H
RD# / WR# asserted
ADDR = Any
RD# / WR# not asserted1
EXTRAM = 1
RD# / WR# asserted
RD# / WR# asserted
RD# / WR# asserted
1. Access limited to ERAM address within 0 to 0FFH; cannot access 100H to 02FFH.
T0-0.0 25114
©2011 Silicon Storage Technology, Inc.
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DS25114A
12/11
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