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STF7N95K3 查看數據表(PDF) - STMicroelectronics

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STF7N95K3 Datasheet PDF : 15 Pages
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STF7N95K3, STP7N95K3, STW7N95K3
Electrical characteristics
Table 6.
Symbol
Switching times
Parameter
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
Test conditions
VDD = 475 V, ID = 3.6 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 19)
Min. Typ. Max Unit
14
ns
9
ns
36
ns
23
ns
Table 7.
Symbol
Source drain diode
Parameter
Test conditions
Min. Typ. Max. Unit
ISD
ISDM (1)
VSD (2)
Source-drain current
Source-drain current (pulsed)
Forward on voltage
ISD = 7.2 A, VGS = 0
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 7.2 A, di/dt = 100A/µs
VDD = 60 V (see Figure 24)
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 7.2 A, di/dt = 100 A/µs
VDD = 60 V, Tj = 150 °C
(see Figure 24)
1. Pulse width limited by safe operating area
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
7.2 A
28.8 A
1.6 V
450
ns
6
µC
28
A
550
ns
8
µC
28
A
Table 8.
Symbol
Gate-source Zener diode
Parameter
Test conditions
Min. Typ. Max. Unit
BVGSO(1)
Gate-source breakdown
voltage
Igs=± 1mA (open drain)
30
V
1. The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components
5/15

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