T14L1024A-10N 查看數據表（PDF） - Taiwan Memory Technology

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T14L1024A-10N

128K X 8 HIGH SPEED CMOS STATIC RAM

Taiwan Memory Technology 

tm TE

CH

TIMING WAVEFORMS

READ CYCLE 1

(Address Controlled)

t

RC

Address

Dout

tAA

tOH

READ CYCLE 2

(Chip Enable Controlled)

tRC

Address

t

AA

OE

t

AOE

t

O LZ

CE1

CE2

t

ACS

tCLZ

D

out

Preliminary T14L1024A

tOH

tOH

t

OHZ

tCH Z

DON'T CARE

UNDEFINED

TM Technology, Inc. reserves the right

P. 5

to change products or specifications without notice.

Publication Date: SEP. 2002

Revision:0.F

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