TC35273 查看數據表（PDF） - Toshiba

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TC35273

TOSHIBA MPEG-4 Audiovisual LSI

Toshiba 

Preliminary

MPEG-4 Audiovisual Codec LSI

TC35273

TCYCLE

CAMCLK

CAMVREF

CAMHREF

CAMPXL

TSETUP

THOLD

Cb0

Y0

Cr0

Y1

Y n-1

Fig. 10 Camera Interface Timing Diagram

Table 13 Camera Interface Timing

Parameter

Description

TCYCLE

TSETUP

Clock cycle of CAMCLK (up to 27MHz)

Setup time of CAMVREF, CAMHREF, CAMPIXEL

THOLD

Hold time of CAMVREF, CAMHREF, CAMPIXL

Min

35

(TSYSCLK*1)+

2

2

Max Unit

ns

ns

ns

TOSHIBA Confidential

16/23

Version 0.90

2000-4-27

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