TDA7437 查看數據表（PDF） - STMicroelectronics
零件编号
产品描述 (功能)
比赛名单
TDA7437 Datasheet PDF : 23 Pages
| |||
TDA7437
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
Test Condition
Min. Typ. Max. Unit
PAUSE DETECTOR
VTH
Pause Threshold
IDELAY
VT HP
Pull-Up Current
Pause Threshold
WIN = 11
WIN = 10
WIN = 01
WIN = 00
30
mV
60
mV
110
mV
220
mV
15
25
35
µA
3.0
V
GENERAL
VCC
Supply Voltage
ICC
Supply Current
PSRR Power Supply Rejection Ratio
eNO
Output Noise
Et
Total Tracking Error
S/N
Signal to Noise Ratio
SC
Channel Separation L - R
d
Distortion
6
7
f = 1KHz
70
Output Muted (B = 20 to 20kHz flat)
All Gains 0dB
(B= 200 to 20kHz flat)
AV = 0 to -20dB
AV = -20 to -60dB
All Gains = 0dB; VO = 2.1Vrms
80
VIN =1V all gain = 0dB
9
10.2
V
10
13
mA
90
dB
4
µV
6
15
µV
0
1
dB
0
2
dB
111
dB
95
dB
0.01 0.08
%
BUS INPUTS
VIL
Input Low Voltage
VlN
Input High Voltage
IlN
Input Current
VO
Output Voltage SDA
Acknowledge
VIN = 0.4V
IO = 1.6mA
1
V
3
V
-5
5
µA
0.1
0.4
V
Note 1: WIN represents the MUTE programming bit pair D6, D5 for the zero crossing window threshold
Note 2: Internall pullup resistor to Vs/2; ”LOW” = softmute active
Note: The ANGND and DIGGND layout wires must be kept separated. A 50Ω resistor is recommended to be put as far as possible
from the device.
The CLD - and CDR - can be shortcircuited in applications providing 3 wires CD signal
L+
L- ∼=R-
CD
R+
L+
L-
TDA7437
R-
R+
CLD - = DIFFINLGND
CDR - = DIFFINRGND
D00AU1125
6/23
Share Link: 