TDA8050 查看數據表（PDF） - Philips Electronics

零件编号

产品描述 (功能)

比赛名单

TDA8050

QPSK transmitter

Philips Electronics 

Philips Semiconductors

QPSK transmitter

APPLICATION INFORMATION

Product specification

TDA8050

handbook, full pagewidth

t su

CLK

DATA

EN

t d(strt)

t h(CLK)

T cy

t d(stp)

MBL113

Fig.8 3-wire bus timing.

Table 1 Data format; note 1

DATA

D11 D10 D9

D8 D7 D6 D5

D4

D3 D2 D1 D0

first in

Modulator reference divider Converter reference divider ratio

ratio

X

X MP1(2) MP0(2) R7

R6

R5

R4

R3 R2 R1 R0

Control register

X

X

X OEN(3) CR2(4) CR1 CR0(4) DAC4(5) DAC3 DAC2 DAC1 DAC0

Main divider ratio

P11 P10 P9

P8

P7 P6 P5

P4

P3 P2 P1 P0

ADDRESS

AD1 AD0

last in

0

1

1

0

1

1

Notes

1. X = don’t care.

2. MP1 and MP0: modulator reference divider ratio (see Table 2).

3. When OEN (output enable) is at logic 0, output is disabled, at logic 1 output is enabled.

4. CR2 to CR0: converter synthesizer charge pump current (see Table 3).

5. When DAC4 to DAC0 is at logic 0 minimum gain is programmed, at logic 1 maximum gain is programmed.

1999 Dec 14

13

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