TDA8768 查看數據表（PDF） - Philips Electronics
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TDA8768 Datasheet PDF : 20 Pages
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Philips Semiconductors
12-bit high-speed Analog-to-Digital
Converter (ADC)
Preliminary specification
TDA8768
SYMBOL
PARAMETER
CONDITIONS
MIN.
THERMAL NOISE
Nth(rms)
thermal noise (RMS value) grounded input;
−
fCLK = 40 MHz
SPURIOUS FREE DYNAMIC RANGE
DRsf
spurious free dynamic range fi = 4.43 MHz
tbf
fi = 10 MHz
tbf
fi = 20 MHz
tbf
SIGNAL-TO-NOISE RATIO; note 5
S/N
signal-to-noise ratio
without harmonics;
−
fCLK = 40 MHz; fi = 4.43 MHz
EFFECTIVE NUMBER OF BITS; note 5
Nbit
effective number of bits
fi = 4.43 MHz
−
TDA8768H/4 (fCLK = 40 MHz) fi = 10 MHz
−
fi = 15 MHz
−
effective number of bits
fi = 4.43 MHz
−
TDA8768H/5 (fCLK = 55 MHz) fi = 10 MHz
−
fi = 15 MHz
−
fi = 20 MHz
−
INTERMODULATION; note 6
TTIR
two-tone intermodulation
fCLK = 40 MHz
tbf
rejection
d3
third order intermodulation fCLK = 40 MHz
tbf
distortion
BIT ERROR RATE
BER
bit error rate
fCLK = 40 MHz;
−
fi = 4.43 MHz;
VI = ±16 LSB at code 2047
Timing (CL = 10 pF); see Fig.3 and note 7
td(s)
sampling delay time
−
th
output hold time
4
td
output delay time
VCCO = 5.25 V
−
VCCO = 3.0 V
3-state output delay times; see Fig.4
tdZH
enable HIGH
−
tdZL
enable LOW
−
tdHZ
disable HIGH
−
tdLZ
disable LOW
−
TYP. MAX. UNIT
0.25 tbf
LSB
69 −
dB
tbf −
dB
tbf −
dB
67 −
dB
10.3 −
bits
tbf −
bits
tbf −
bits
9.9 −
bits
tbf −
bits
tbf −
bits
tbf −
bits
66 −
dB
67 −
dB
10−15 tbf
times/
sample
−
2
ns
−
−
ns
10 15
ns
13 18
ns
14 18
ns
16 20
ns
16 20
ns
14 18
ns
1998 Aug 26
9
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