TDA9850 查看數據表（PDF） - Philips Electronics
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TDA9850 Datasheet PDF : 32 Pages
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Philips Semiconductors
I2C-bus controlled BTSC stereo/SAP decoder
Preliminary specification
TDA9850
FEATURES
• Quasi alignment-free application due to automatic
adjustment of channel separation via I2C-bus
• Dbx noise reduction circuit
• Dbx decoded stereo, Second Audio Program (SAP) or
mono selectable at the AF outputs
• Additional SAP output without dbx, including
de-emphasis
• High integration level with automatically tuned
integrated filters
• Input level adjustment I2C-bus controlled
• Alignment-free SAP processing
• Stereo pilot PLL circuit with ceramic resonator,
automatic adjustment procedure for stereo channel
separation, two pilot thresholds selectable via I2C-bus
• Automatic pilot cancellation
• Composite input noise detector with I2C-bus selectable
thresholds for stereo and SAP off
• I2C-bus transceiver.
GENERAL DESCRIPTION
The TDA9850 is a bipolar-integrated BTSC stereo/SAP
decoder (I2C-bus controlled) for application in TV sets,
VCRs and multimedia.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
VCC
supply voltage
8.5
ICC
supply current
−
Vcomp(rms) input signal voltage (RMS value) 100% modulation L + R; fi = 300 Hz −
VoR(rms); output signal voltage (RMS value) 100% modulation L + R; fi = 300 Hz −
VoL(rms)
GLA
input level adjustment control
−3.5
αcs
stereo channel separation
fL = 300 Hz; fR = 3 kHz
25
THDL,R total harmonic distortion L + R
fi = 1 kHz
−
S/N
signal-to-noise ratio
500 mV (RMS) mono output signal
CCIR noise weighting filter
−
(peak value)
DIN noise weighting filter
−
(RMS value)
TYP.
9
58
250
500
−
35
0.2
60
73
MAX. UNIT
9.5 V
75
mA
−
mV
−
mV
+4.0 dB
−
dB
−
%
−
dB
−
dBA
ORDERING INFORMATION
TYPE NUMBER
TDA9850
TDA9850T
NAME
SDIP32
SO32
PACKAGE
DESCRIPTION
plastic shrink dual in-line package; 32 leads (400 mil)
plastic small outline package; 32 leads; body width 7.5 mm
VERSION
SOT232-1
SOT287-1
1995 Jun 19
2
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