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UPD16707 查看數據表(PDF) - NEC => Renesas Technology

零件编号
产品描述 (功能)
比赛名单
UPD16707
NEC
NEC => Renesas Technology NEC
UPD16707 Datasheet PDF : 21 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Table 2-1 Pad Coordinate Bump size (7/7)
PAD No.
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
PAD Name
VDD1
DUMMY
DUMMY
VSS
VSS
STVR
STVR
PASSR
PASSR
CLKR
CLKR
VSS
VSS
R,/LR
R,/LR
VDD1
VDD1
/AOR
/AOR
DUMMY
X
312.0
312.0
221.0
143.0
143.0
88.0
88.0
33.0
33.0
-22.0
-22.0
-77.0
-77.0
-132.0
-132.0
-187.0
-187.0
-242.0
-242.0
-320.0
Y
7225.0
7303.0
7879.0
7778.0
7879.0
7778.0
7879.0
7778.0
7879.0
7778.0
7879.0
7778.0
7879.0
7778.0
7879.0
7778.0
7879.0
7778.0
7879.0
7879.0
(X:Y) [µ m]
Bump size
83:33
50:87
87:50
33:83
33:83
33:83
33:83
33:83
33:83
33:83
33:83
33:83
33:83
33:83
33:83
33:83
33:83
33:83
33:83
87:50
Bump Specs (Standard reference value)
Parameter
Bump size tolerance
Bump height (design center value)
Bump height tolerance (within lot)
Bump height tolerance (within chip)
Bump hardness
Specifications
±5 µm
15 µm
±4 µm
Range : 3 µm
50 ± 20 Hv
µ PD16707
10
Data Sheet S16411EJ1V0DS

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