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UPD754302A 查看數據表(PDF) - NEC => Renesas Technology

零件编号
产品描述 (功能)
比赛名单
UPD754302A
NEC
NEC => Renesas Technology NEC
UPD754302A Datasheet PDF : 74 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
µPD754302, 754304, 754302(A), 754304(A)
Functional Outline
Parameter
Instruction execution time
On-chip memory
ROM
RAM
General-purpose register
Function
• 0.95, 1.91, 3.81, 15.3 µs (@ 4.19 MHz with system clock)
• 0.67, 1.33, 2.67, 10.7 µs (@ 6.0 MHz with system clock)
2048 × 8 bits (µPD754302)
4096 × 8 bits (µPD754304)
256 × 4 bits
• 4-bit operation: 8 × 4 banks
• 8-bit operation: 4 × 4 banks
Input/
output
port
CMOS input
CMOS input/output
8 On-chip pull-up resistors can be specified by software: 7
18 On-chip pull-up resistors can be specified by software: 18
Timer
N-ch open-drain
input/output pins
Total
Serial interface
Bit sequential buffer
Clock output (PCL)
Vectored interrupts
Test input
System clock oscillator
Standby function
Operating ambient
temperature
Power supply voltage
Package
4 13 V withstand voltage. On-chip pull-up resistors can be specified by
mask option.
30
3 channels
• 8-bit timer/event counter: 2 channels (16-bit timer/event counter)
• Basic interval timer/watchdog timer: 1 channel
• 3-wire serial I/O mode ... MSB or LSB can be selected for transferring top bit
• 2-wire serial I/O mode
16 bits
Φ, 524, 262, 65.5 kHz (@ 4.19 MHz with system clock)
Φ, 750, 375, 93.8 kHz (@ 6.0 MHz with system clock)
External: 3, Internal: 4
External: 1
Ceramic or crystal oscillator
STOP/HALT mode
TA = –40 to +85 ˚C
VDD = 1.8 to 5.5 V
36-pin plastic shrink SOP (300 mil, 0.8-mm pitch)
3

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