VS1011 查看數據表（PDF） - Unspecified

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VS1011

MP3 AUDIO CODEC

Unspecified 

VLSI

Solution y

VS1011 PRELIMINARY

VS1011

7. SPI BUSES

XCS

SCK

tXCSS

0

1

tWL tWH

14

15

16

tXCSH

30

31

tXCS

SI

SO

tZ

tH

tSU

tV

tDIS

Figure 7: SPI Timing Diagram.

7.6 SPI Examples with SM SDINEW and SM SDISHARED set

7.6.1 Two SCI Writes

SCI Write 1

SCI Write 2

XCS

0

1

2

3

SCK

SI

0

0

0

0

30 31

10

X

32 33

0

0

61 62 63

2

1

0

X

Figure 8: Two SCI Operations.

Figure 8 shows two consecutive SCI operations. Note that xCS must be raised to inactive state between

the writes.

7.6.2 Two SDI Bytes

SDI data is synchronized with a raising edge of xCS as shown in Figure 9. However, every byte doesn’t

need separate synchronization.

7.6.3 SCI Operation in Middle of Two SDI Bytes

Figure 10 shows how an SCI operation is embedded in between SDI operations. The changes in xCS are

used to synchronize both SDI and SCI.

Version 0.71, 2004-07-20

20

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