VT82C586B 查看數據表（PDF） - Unspecified

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VT82C586B

PCI Integrated Peripheral Controller

Unspecified 

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VT82C586B

Signal Name

PWRGD

PCIRST#

RSTDRV

BCLK

OSC

Signal Name

PWRBTN#

PWRON

RI#

Signal Name

VDD5

VDD-5VSB

VDD3

VDD_PCI

AVDD

AGND

GND

Pin No.

138

3

4

14

6

Resets and Clocks

I/O Signal Description

I Power Good. Connected to the POWERGOOD signal on the Power Supply.

O PCI Reset. An active low reset signal for the PCI bus. The VT82C586B will

generate PCIRST# during power-up or from the control register.

O Reset Drive. RSTDRV is the reset signal to the ISA bus.

O Bus Clock. ISA bus clock.

I Oscillator. OSC is the 14.31818 MHz clock signal. It is used by the internal Timer.

Pin No.

91

107

93

Power Management

I/O Signal Description

I Power Button. Referenced to VDD-5VSB.

O Power Supply Control. Powered by VDD-5VSB.

I Ring Indicator. May be connected to external modem circuitry to allow the system

to be re-activated by a received phone call. Input referenced to VDD-5VSB.

Power and Ground

Pin No.

17, 34, 53, 79,

115

103

144

157, 171, 184,

198

100

101

13, 26, 39, 52,

68, 84, 120,

140, 156, 166,

177, 188, 197,

208

I/O Signal Description

P Power Supply. 4.75 to 5.25V. This supply is turned on only when the mechanical

switch on the power supply is turned on and the PWRON signal is conditioned high.

P Power Supply. Always available unless the mechanical switch of the power supply

is turned off. If the "soft-off" state is not implemented, then this pin can be

connected to VDD5.

P Power Supply. This pin should be connected to the same voltage as the CPU I/O

circuitry.

P PCI Voltage. 3.3 or 5V.

P USB Differential Output Power Source

P USB Differential Output Ground

P Ground

Revision 1.0 May 13, 1997

-13-

Pinouts

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