W137 查看數據表（PDF） - Cypress Semiconductor
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W137 Datasheet PDF : 10 Pages
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W137
DC Electrical Characteristics: (continued)
TA = 0°C to +70°C; VDDQ3 = 3.3V±5%; VDDQ2 = 2.5V±5%; CPU0:1 = 66.6/100 MHz
Parameter
Description
Test Condition
Pin Capacitance/Inductance
CIN
COUT
LIN
Input Pin Capacitance
Output Pin Capacitance
Input Pin Inductance
Except X1 and X2
Min.
Typ.
Max. Unit
5
pF
6
pF
7
nH
AC Electrical Characteristics
TA = 0°C to +70°C; VDDQ3 = 3.3V±5%; VDDQ2 = 2.5V±5%; fXTL = 14.31818 MHz
AC clock parameters are tested and guaranteed over stated operating conditions using the stated lump capacitive load at the
clock output.
CPU Clock Outputs, CPU0:1 (Lump Capacitance Test Load = 20 pF)
CPU = 66.6 MHz CPU = 100 MHz
Parameter
Description
Test Condition/Comments
Min. Typ. Max. Min. Typ. Max. Unit
tP
Period
Measured on rising edge at 1.25V
15
15.5 10
10.5 ns
tH
High Time
Duration of clock cycle above 2.0V
5.2
3.0
ns
tL
Low Time
Duration of clock cycle below 0.4V
5.0
2.8
ns
tR
Output Rise Edge Rate Measured from 0.4V to 2.0V
1
41
4 V/ns
tF
Output Fall Edge Rate Measured from 2.0V to 0.4V
1
41
4 V/ns
tD
Duty Cycle
Measured on rising and falling edge at 45
1.25V
55 45
55 %
tJC
Jitter, Cycle-to-Cycle Measured on rising edge at 1.25V. Max-
200
imum difference of cycle time between
two adjacent cycles.
200 ps
tSK
Output Skew
Measured on rising edge at 1.25V
175
fST
Frequency Stabilization Assumes full supply voltage reached
3
from Power-up (cold within 1 ms from power-up. Short cycles
start)
exist prior to frequency stabilization.
175 ps
3 ms
Zo
AC Output Impedance Average value during switching transi-
13.5
tion. Used for determining series termi-
nation value.
13.5
Ω
6
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