PDU18F 查看數據表（PDF） - Data Delay Devices
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PDU18F Datasheet PDF : 5 Pages
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8-BIT PROGRAMMABLE
DELAY LINE
(SERIES PDU18F)
PDU18F
ddaeltaay 3
devices, inc.
FEATURES
• Digitally programmable in 256 delay steps
• Monotonic delay-versus-address variation
• Two separate outputs: inverting & non-inverting
• Precise and stable delays
• Input & outputs fully TTL interfaced & buffered
• 10 T2L fan-out capability
• Fits standard 40-pin DIP socket
• Auto-insertable
N/C 1
OUT/ 2
OUT 3
EN/ 4
GND 5
N/C 6
N/C 7
N/C 8
GND 9
N/C 10
N/C 11
N/C 12
N/C 13
GND 14
N/C 15
EN/ 16
A7 17
IN 18
N/C 19
GND 20
PACKAGES
40 VCC
39 N/C
38 A0
37 A1
36 A2
35 VCC
34 N/C
33 A3
32 A4
31 A5
30 VCC
29 N/C
28 N/C
27 N/C
26 N/C
25 VCC
24 N/C
23 A6
22 N/C
21 N/C
PDU18F-xx
DIP
PDU18F-xxC5
Gull-Wing
PDU18F-xxM
Military DIP
PDU18F-xxMC5
Military Gull-Wing
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The PDU18F-series device is a 8-bit digitally programmable delay line.
IN Delay Line Input
The delay, TDA, from the input pin (IN) to the output pins (OUT, OUT/)
OUT Non-inverted Output
depends on the address code (A7-A0) according to the following formula:
OUT/ Inverted Output
A0-A7 Address Bits
TDA = TD0 + TINC * A
EN/ Output Enable
VCC +5 Volts
where A is the address code, TINC is the incremental delay of the device,
GND Ground
and TD0 is the inherent delay of the device. The incremental delay is
specified by the dash number of the device and can range from 0.5ns through 10ns, inclusively. The
enable pins (EN/) are held LOW during normal operation. These pins must always be in the same state
and may be tied together externally. When these signals are brought HIGH, OUT and OUT/ are forced into
LOW and HIGH states, respectively. The address is not latched and must remain asserted during normal
operation.
SERIES SPECIFICATIONS
• Programmed delay tolerance: 5% or 2ns,
whichever is greater
• Inherent delay (TD0): 13ns typical (OUT)
12ns typical (OUT/)
• Setup time and propagation delay:
Address to input setup (TAIS): 10ns
Disable to output delay (TDISO): 6ns typ. (OUT)
• Operating temperature: 0° to 70° C
• Temperature coefficient: 100PPM/°C (excludes TD0)
• Supply voltage VCC: 5VDC ± 5%
• Supply current: ICCH = 65ma
ICCL = 128ma
• Minimum pulse width: 6% of total delay
DASH NUMBER SPECIFICATIONS
Part
Number
PDU18F-.5
PDU18F-1
PDU18F-2
PDU18F-3
PDU18F-4
PDU18F-5
PDU18F-6
PDU18F-8
PDU18F-10
Incremental
Delay
Per Step (ns)
.5 ± .3
1 ± .5
2 ± .5
3 ± 1.0
4 ± 1.0
5 ± 1.5
6 ± 1.5
8 ± 2.0
10 ± 2.0
Total Delay
Change (ns)
127.5 ± 6.4
255 ± 12.8
510 ± 25.5
765 ± 38.3
1,020 ± 51.0
1,275 ± 63.8
1,530 ± 76.5
2,040 ± 102.0
2,550 ± 127.5
NOTE: Any dash number between .5 and 10 not
shown is also available.
1997 Data Delay Devices
Doc #97006
DATA DELAY DEVICES, INC.
1
1/30/06
3 Mt. Prospect Ave. Clifton, NJ 07013
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