W83194R 查看數據表（PDF） - Winbond
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W83194R Datasheet PDF : 11 Pages
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W83194R-630A
5. PIN DESCRIPTION
IN - Input
OUT - Output
I/O - Bi-directional Pin
# - Active Low
* - Internal 250kΩ pull-up
5.1 Crystal I/O
SYMBOL
PIN
Xin
4
Xout
5
PRELIMINARY
I/O
IN
OUT
FUNCTION
Crystal input with internal loading capacitors and
feedback resistors.
Crystal output at 14.318MHz nominally.
5.2 CPU, SDRAM, PCI Clock Outputs
SYMBOL
PIN
CPUCLK_F
46
CPUCLK [ 0:1 ]
SDRAM_F
45,43
40
SDRAM0/CPU_STOP#
17
SDRAM1/PCI_STOP#
18
SDRAM2/PD#
20
SDRAM[3:12]
PCICLK_F/ *FS1
21,28,29,31,32
,34,35,37,38,
41
7
I/O
OUT
OUT
OUT
I/O
I/O
I/O
OUT
I/O
FUNCTION
Low skew (< 250ps) clock outputs for host
frequencies such as CPU, Chipset and Cache.
VddLCPU is the supply voltage for these outputs.
This pin will not be stopped by CPU_STOP#
Low skew (< 250ps) clock outputs for host
frequencies such as CPU, Chipset and Cache.
VddLCPU is the supply voltage for these outputs.
SDRAM clock outputs which have syn. or asyn.
frequencies as CPU clocks.
This pin will not be stopped by CPU_STOP#
SDRAM clock outputs which have syn. or asyn.
frequencies as CPU clocks.
CPU_STOP# input pin when MODE=0.
SDRAM clock outputs which have syn. or asyn.
frequencies as CPU clocks.
PCI_STOP# input pin when MODE=0.
SDRAM clock outputs which have syn. or asyn.
frequencies as CPU clocks.
PD# input pin when MODE=0.
SDRAM clock outputs which have syn. or asyn.
frequencies as CPU clocks.
Latched input for FS1 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
Publication Release Date: Nov. 1999
-3-
Revision 0.65
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