W83194BR-603 查看數據表（PDF） - Winbond
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W83194BR-603 Datasheet PDF : 26 Pages
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W83194BR-603/W83194BG-603
CLOCK GEN. FOR INTEL P4 SPRINGDALE/PRESCOTT SERIES CHIPSET
CPU, SRC, 3V66 and PCI Clock Outputs, continued
PIN
PIN NAME
8
PCI_F1
FS4&
9
PCI_F2
12 PCI0
MODE&
13,14,15,18 PCI [1:5]
,19
TYPE
DESCRIPTION
OUT 3.3V PCI free running clock output.
INtd120k Latched input for FS4 at initial power up for H/W selecting
the output frequency, This is internal 120K pull down.
OUT 3.3V PCI free running clock output.
OUT 3.3V PCI clock output.
INtd120k Latched input for pin 30 at initial power up selecting the
0=3V66 clock output, 1=RESET# control pin. This is internal
120KΩ pull down.
OUT Low skew (< 250ps) 3.3V PCI clock outputs.
5.3 Fixed Frequency Outputs
PIN
PIN NAME
1
REF0
FS1*
2
REF1
FS0&
22 48MHz
FS3&
21 24_48MHz
SEL24_48#&
TYPE
OUT
INtp120k
OUT
INtd120k
OUT
INtd120k
OUT
INtd120k
DESCRIPTION
14.318MHz output.
Latched input for FS1 at initial power up for H/W selecting
the output frequency. This is internal 120K pull up.
14.318MHz output.
Latched input for FS0 at initial power up for H/W selecting
the output frequency. This is internal 120K pull down.
48MHz clock output for USB.
Latched input for FS3 at initial power up for H/W selecting
the output frequency. This is internal 120K pull down.
24MHz or 48MHz(default) clock output, In power on reset
period, it is a hardware-latched pin, and it can be R/W by
I2C control after power on reset period. Select by register 5
bit 7.
Latched input for 24MHz or 48MHz select pin. This is
internal 120K pull down default 48MHz. In power on reset
period, it is a hardware-latched pin, and it can be R/W by
I2C control after power on reset period. Select by register 5
bit 7.
5.4 I2C Control Interface
PIN
PIN NAME
32 SDATA*
31 SCLK*
TYPE
I/OD
IN
DESCRIPTION
Serial data of I2C 2-wire control interface with internal pull-
up resistor.
Serial clock of I2C 2-wire control interface with internal pull-
up resistor.
-4-
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