W83176G-400 查看數據表（PDF） - Winbond

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W83176G-400

Winbond Current Mode Differential Buffer for PCI Express and SATA

Winbond 

W83176R-400/W83176G-400

CURRENT MODE DIFFERENTIAL BUFFER FOR PCI EXPRESS AND SATA

Table of Content-

1. GENERAL DESCRIPTION ......................................................................................................... 1

2. PRODUCT FEATURES .............................................................................................................. 1

3. PIN CONFIGURATION ............................................................................................................... 1

4. BLOCK DIAGRAM ...................................................................................................................... 2

5. PIN DESCRIPTION..................................................................................................................... 3

5.1 Clock Outputs ..............................................................................................................................3

5.2 Power Pins...................................................................................................................................3

6.

I2C CONTROL AND STATUS REGISTERS............................................................................... 4

6.1 Register 0: Control Register (Default: 07h) ................................................................................4

6.2 Register 1: Control Register (Default: FFh) ................................................................................4

6.3 Register 2: Control Register (Default: 00h) ................................................................................4

6.4 Register 3: Reserved Register (Default: 00h) ............................................................................5

6.5 Register 4: Winbond Chip ID – Project Code Register (Default: 11h).......................................5

6.6 Register 5: Test Register (Default: 00h) .....................................................................................5

7. ACCESS INTERFACE ................................................................................................................ 6

7.1 Block Write protocol.....................................................................................................................6

7.2 Block Read protocol ....................................................................................................................6

7.3 Byte Write protocol ......................................................................................................................6

7.4 Byte Read protocol......................................................................................................................6

8. ORDERING INFORMATION....................................................................................................... 7

9. HOW TO READ THE TOP MARKING........................................................................................ 7

10. PACKAGE DRAWING AND DIMENSIONS................................................................................ 8

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