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WED3EG7233S-D3 查看數據表(PDF) - White Electronic Designs Corporation

零件编号
产品描述 (功能)
比赛名单
WED3EG7233S-D3
WEDC
White Electronic Designs Corporation WEDC
WED3EG7233S-D3 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
White Electronic Designs
WED3EG7233S-D3
-JD3
ADVANCED
DDR SDRAM COMPONENT ELECTRICAL CHARACTERISTICS AND
RECOMMENDED AC OPERATING CONDITIONS (continued)
0°C ≤ TA ≤ +70°C; VCC = +2.5V ± 0.2V, VCCQ = +2.5V ± 0.2V
AC Characteristics
262
265, 202
Parameter
Symbol
Min
Max
Min
Max
Units
ACTIVE to READ or WRITE delay
PRECHARGE command period
DQS read preamble
DQS read postamble
ACTIVE bank a to ACTIVE bank b command
DQS write preamble
DQS write preamble setup time
DQS write postamble
Write recovery time
Internal WRITE to READ command delay
Data valid output window
REFRESH to REFRESH command interval
Average periodic refresh interval
Terminating voltage delay to VCC
Exit SELF REFRESH to non-READ command
Exit SELF REFRESH to READ command
tRCD
20
20
ns
tRP
20
20
ns
tRPRE
0.9
1.1
0.9
1.1
tCK
tRPST
0.4
0.6
0.4
0.6
tCK
tRRD
15
15
ns
tWPRE
0.25
0.25
tCK
tWPRES
0
0
ns
tWPST
0.4
0.6
0.4
0.6
tCK
tWR
15
15
ns
tWTR
1
1
tCK
NA
tQH-tDQSQ
tQH-tDQSQ
ns
tREFC
70.3
70.3
μs
tREFI
7.8
7.8
μs
tVTD
0
0
ns
tXSNR
75
75
ns
tXSRD
200
200
tCK
Notes
19
10,11
9
13
12
12
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May, 2005
Rev. 0
8
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

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