WM8734-EV1M 查看數據表（PDF） - Wolfson Microelectronics plc

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WM8734-EV1M

WM8734 Evaluation Board User Handbook

Wolfson Microelectronics plc 

LINKS

SWITCHES

WM8734-EV1M

LINKS & JUMPERS

J8

J21

J18

J14 (BCLK)

J16 (DACLRC)

J17 (ADCLRC)

DESCRIPTION

OPEN - SPI software interface control

SHORT - 2-wire software interface control

OPEN - ROUT signal is AC coupled

SHORT - ROUT signal with no AC coupling1

OPEN - LOUT signal is AC coupled

SHORT - LOUT signal with no AC coupling1

OPEN - Master mode

SHORT - Slave mode

OPEN - Master mode

SHORT - Slave mode

OPEN - Master mode

SHORT - Slave mode

J9

J20

Table 3 Links

ADCLRC input for slave mode2

DACLRC output used for external sync

Note:

1. Caution: Output signals in this configuration will be DC biased to AVDD/2

2. When running the ADC in slave mode; ADCLRC can be generated from a correctly

formatted digital input on J12 or U1. SW3 must be in position 1-2.

SWITCH

SW1

(DATA FORMAT)

SW2

SW3

Table 4 Switches

DESCRIPTION

123456

DATA FORMAT

100100

I2S Compatible

100001

24-bit Right Justified

100000

Left Justified

After an input data format change has been made using SW1, the

CS8427 will only latch the new settings after SW2 has been pressed

and released.

Pins 1 & 2 SHORT - DACLRC used to supply ADCLRC in Slave Mode.

Pins 2 & 3 SHORT - external ADCLRC may be applied via J9.

w

Rev 1.2 November 2002

5

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