X3100 查看數據表（PDF） - Xicor -> Intersil

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产品描述 (功能)

比赛名单

X3100

3 or 4 Cell Li-Ion Battery Protection and Monitor IC

Xicor -> Intersil 

X3100/X3101 – Preliminary Information

Figure 2. Power Up Timing (Initial Power Up or after Sleep Mode)

TPUR

VCC

VSLR

0V

VRGO

0V

Voltage Regulator Output Status

(Internal Signal) VRGS

Over-current Detection Status

(Internal Signal) OCDS

Status Register Bit 0

VRGS+OCDS

Status Register Bit 2

(SWCEN=0) CCES+OVDS

Status Register Bit 2

(SWCEN=1)

OVDS

AS2_AS0

SPI PORT

5V±10% (Stable and Repeatable)

VRGO Tuned to 5V±0.5%

5V

2ms (Typ.)

1

0

TOC

1

1 = X3100/1 in Over-Current Protection Mode

0 = X3100/1 NOT in Over-Current Protection Mode

0

1 1 = X3100/1 in Over-Current Protection Mode OR VRGO Not Yet Tuned

0 = X3100/1 NOT in Over-Current Protection Mode AND VRGO Tuned

0

TOV+200ms

1

0

1 = VCELL < VCE OR X3100/1 in Over-charge Protection Mode

0 = VCELL > VCE OR X3100/1 NOT in Over-charge Protection Mode

1

0

1 = X3100/1 in Over-charge Protection Mode

0 = X3100/1 NOT in Over-charge Protection Mode

TOV+200ms OR TUV+200ms (whichever is longer)

Any Read or Write Operation, except

turn-on of FETs can start here.

Charge, Discharge FETs can be

turned on here.

REV 1.1.8 12/10/02

www.xicor.com

Characteristics subject to change without notice. 7 of 40

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