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ICX076AK 查看數據表(PDF) - Sony Semiconductor

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产品描述 (功能)
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ICX076AK Datasheet PDF : 19 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
(5) Substrate clock waveform
100%
90%
VSUB
10%
0%
VφSUB
tr
twh
φM
φM
2
tf
ICX076AK
Clock Switching Characteristics
twh
twl
tr
tf
Item
Symbol
Unit Remarks
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
Readout clock VT
2.3 2.5
0.5
0.5
µs
During
readout
Vertical transfer Vφ1, Vφ2,
clock
Vφ3, Vφ4
15
250 ns 1
Hφ
Horizontal
transfer clock
Hφ1
Hφ2
Reset gate clock φRG
55 67
5.6
25 34
55 67
5.6
107
9 18
0.007
0.007
8
7 18
0.007
0.007
5
ns During imaging
µs During
parallel-serial
µs conversion
ns
Substrate clock φSUB
1.5 1.65
During drain
0.5
0.5 µs charge
1 When vertical transfer clock driver CXD1267 is used. tr and tf are defined by the rise and fall times for 10%
to 90% of the interval between VVL and VVH.
–8–

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