1.5
Functional Block Diagram
PSB 4860
RST OSC1 OSC2 XTAL1 XTAL2
Reset and Timing Unit
AFECLK
AFEFS
AFEDD
AFEDU
Analog
Front End
Interface
DSP
Memory Interface
Data
Interface
Control
Interface
DRST
DXST
DU/DX
DD/DR
DCL
FSC
INT
SDX
SDR
SCLK
CS
FRDY
MA0-MA15 MD0-MD7 CAS0/ CAS1/ RAS/ W/ VPRD/
ALE FCS FOE FWE FCLE
Figure 3 Block Diagram of
Data Sheet
19
2000-01-14