HEC4015BDB 查看數據表（PDF） - Philips Electronics

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HEC4015BDB

Dual 4-bit static shift register

Philips Electronics 

Philips Semiconductors

Dual 4-bit static shift register

Product specification

HEF4015B

MSI

Dynamic power

dissipation per

package (P)

VDD

V

TYPICAL FORMULA FOR P (µW)

5

1 500 fi + ∑ (foCL) × VDD2

where

10

6 300 fi + ∑ (foCL) × VDD2

fi = input freq. (MHz)

15

17 000 fi + ∑ (foCL) × VDD2

fo = output freq. (MHz)

CL = load capacitance (pF)

∑ (foCL) = sum of outputs

VDD = supply voltage (V)

Fig.4 Waveforms showing set-up times, hold times and minimum clock pulse width. Set-up and hold times are

shown as positive values but may be specified as negative values.

Fig.5 Waveforms showing recovery time for MR and minimum MR pulse width.

January 1995

5

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