74HC597(2016) 查看數據表（PDF） - NXP Semiconductors.

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74HC597
(Rev.:2016)

8-bit shift register with input flip-flops

NXP Semiconductors. 

Nexperia

74HC597; 74HCT597

8-bit shift register with input flip-flops

6. Functional description

Table 3. Function table[1]

Inputs

STCP

SHCP

PL

MR



X

X

X



X

L

H

no clock edge X

L

H

X

X

L

L

X

X

H

L

X



H

H

[1] H = HIGH voltage level.

L = LOW voltage level.

X = don’t care.

 = positive-going transition.

Function

data loaded to input latches

data loaded from inputs to shift register

data transferred from input flip-flops to shift register

invalid logic, state of shift register is indeterminate

when signals removed

shift register cleared

shift register clocked Qn = Qn1, Q0 = DS

6+&3

'6

05

3/

67&3

'

+

'

/

'

+

'

/

'

+

'

+

'

/

'

+

4

/

/+ / +

UHVHW

VKLIW

UHJLVWHU

VHULDOVKLIW

ORDGLQSXW

UHJLVWHU

SDUDOOHOORDG

VKLIWUHJLVWHU

Fig 6. Timing diagram

/

/

/

/

/

/

/

/

/

+

/

+

/

/

+

/

+ / + / + /+

/ //

/

VHULDOVKLIW

VHULDOVKLIW

/ ++

VHULDOVKLIW

ORDGLQSXW

UHJLVWHU

SDUDOOHOORDG

VKLIWUHJLVWHU

SDUDOOHOORDGERWK

LQSXWDQGVKLIWUHJLVWHUV

DDD

74HC_HCT597

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 4 — 25 February 2016

© Nexperia B.V. 2017. All rights reserved

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