74HC377-Q100 查看數據表（PDF） - NXP Semiconductors.
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74HC377-Q100 Datasheet PDF : 18 Pages
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74HC377-Q100; 74HCT377-Q100
Octal D-type flip-flop with data enable; positive-edge trigger
Rev. 1 — 21 October 2013
Product data sheet
1. General description
The 74HC377-Q100; 74HCT377-Q100 is an octal positive-edge triggered D-type flip-flop.
The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs
Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time
requirements on the LOW-to-HIGH clock (CP) transition. Input E must be stable one
set-up time prior to the LOW-to-HIGH transition for predictable operation. Inputs include
clamp diodes that enable the use of current limiting resistors to interface inputs to voltages
in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Input levels:
For 74HC377-Q100: CMOS level
For 74HCT377-Q100: TTL level
Common clock and master reset
Eight positive edge-triggered D-type flip-flops
Complies with JEDEC standard no. 7A
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
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