ST16C2450(2003) 查看數據表（PDF） - Exar Corporation

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ST16C2450
(Rev.:2003)

2.97V TO 5.5V DUART

Exar Corporation 

áç

REV. 4.0.0

ST16C2450

2.97V TO 5.5V DUART

2.10 Internal Loopback

The 2450 UART provides an internal loopback capability for system diagnostic purposes. The internal

loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally.

Figure 7 shows how the modem port signals are re-configured. Transmit data from the transmit shift register

output is internally routed to the receive shift register input allowing the system to receive the same data that it

was sending. The TX pin is held at logic 1 or mark condition while RTS# and DTR# are de-asserted, and

CTS#, DSR# CD# and RI# inputs are ignored. Caution: the RX input must be held to a logic 1 during loopback

test else upon exiting the loopback test the UART may detect and report a false “break” signal.

FIGURE 7. INTERNAL LOOP BACK IN CHANNELS A AND B

VCC

Transmit Shift Register

(THR/FIFO)

MCR bit-4=1

Receive Shift Register

(RHR/FIFO)

VCC

RTS#

CTS#

VCC

DTR#

DSR#

RI#

OP1#

VCC

OP2#

CD#

TXA/TXB

RXA/RXB

RTSA#/RTSB#

CTSA#/CTSB

DTRA#/DTRB#

DSRA#/DSRB#

RIA#/RIB#

OP2A#/OP2B#

CDA#/CDB#

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