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AS5C2568 查看數據表(PDF) - Austin Semiconductor

零件编号
产品描述 (功能)
比赛名单
AS5C2568
AUSTIN
Austin Semiconductor AUSTIN
AS5C2568 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
Austin Semiconductor, Inc.
SRAM
AS5C2568
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Note 5) (-55oC < TC < 125oC or -40oC to +85oC; VCC = 5.0V +10%)
DESCRIPTION
SYM
-12
-15
-20
UNITS NOTES
MIN MAX MIN MAX MIN MAX
READ CYCLE
READ cycle time
tRC
12
15
20
ns
Address access time
tAA
12
15
20
ns
Chip enable access time
tACE
12
15
20
ns
Output hold from address change tOH
2
2
2
ns
Chip enable to output in Low-Z
tLZCE
2
2
2
ns
7
Chip disable to output in High-Z tHZCE
7
8
9
ns 6, 7
Chip enable to power-up time
tPU
0
0
0
ns
4
Chip disable to power-down time
tPD
12
15
20
ns
4
Output enable to access time
tAOE
6
7
8
ns
Output enable to output in Low-Z tLZOE
0
0
0
ns
Output disable to output in High-Z tHZOE
6
7
8
ns
6
WRITE CYCLE
WRITE cycle time
tWC
12
15
20
ns
Chip enable to end of write
tCW
9
10
12
ns
Address valid to end of write
tAW
9
10
12
ns
Address setup time
tAS
0
0
0
ns
Address hold from end of write
tAH
0
0
0
ns
WRITE pulse width
tWP
10
12
15
ns
Data setup time
tDS
7
8
10
ns
Data hold time
tDH
0
0
0
ns
Write disable to output in Low-Z
tLZWE
2
2
2
ns
7
Write enable to output in High-Z tHZWE 0
7
0
7
0
9
ns 6, 7
AS5C2568
Rev. 2.6 06/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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