+12 V
CS51311
+5.0 V
680 pF
1.0 μF
1200 μF/10 V × 3
10 k
0.01 μF
0.1 μF
COFF
COMP
VCC
GATE(H)
100 Ω
VID0
GATE(L)
VID1 CS51311
VID2
VFB
VID3
VOUT
VID4
GND PWRGD
FS70VSJ−03
FS70VSJ−03
1.2 μH 3.3 mΩ
VCC(CORE)
2.0 V @ 19 A
510 Ω
1200 μF/10 V × 5
0.1 μF
510 Ω
PWRGD
Figure 1. Application Diagram
ABSOLUTE MAXIMUM RATINGS*
Rating
Operating Junction Temperature, TJ
Lead Temperature Soldering:
Storage Temperature Range, TS
ESD Susceptibility
1. 60 second maximum above 183°C.
*The maximum package power dissipation must be observed.
Value
Unit
150
°C
Reflow: (SMD styles only) (Note 1) 230 peak
°C
−65 to +150 °C
2.0
kV
ABSOLUTE MAXIMUM RATINGS
Pin Name
Pin Symbol
IC Power Input
Compensation Pin
VCC
COMP
Voltage Feedback Input,
Output Voltage Sense Pin,
Voltage ID DAC Inputs
VFB, VOUT, VID0−4
Off−Time Pin
COFF
High−Side, Low−Side FET Drivers GATE(H), GATE(L)
Power Good Output
PWRGD
Ground
GND
VMAX
16 V
6.0 V
6.0 V
VMIN
−0.3 V
−0.3 V
−0.3 V
ISOURCE
N/A
1.0 mA
1.0 mA
ISINK
1.5 A Peak, 200 mA DC
5.0 mA
1.0 mA
6.0 V
16 V
6.0 V
0V
−0.3 V
1.0 mA
−0.3 V DC 1.5 A Peak, 200 mA DC
−0.3 V
1.0 mA
0V
1.5 A Peak, 200 mA DC
50 mA
1.5 A Peak, 200 mA DC
30 mA
N/A
http://onsemi.com
2