HT761X 查看數據表（PDF） - Holtek Semiconductor
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HT761X Datasheet PDF : 12 Pages
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Fig.4 and Fig.5 are similar but in Fig.5 the input signal of
amplifier is taken from the drain of the PIR. This has
higher gain than that in Fig.4. Since OP1 is a PMOS in-
put VD, it has to be greater than 1.2V for adequate oper-
ation.
VEE
R1
22kW
V DD
P IR
D
G
S
56kW
C1
22mF
R2
1M W
C2
0 .0 2 2 m F
O P1
O P1 O UT
VEE
Fig. 4 Typical First-Stage PIR
HT761X
VEE
C 11
22mF
R 11
22kW
V DD
R 12
510kW
R 13
100kW ~180kW
VD
C 12
0 .0 4 7
P IR
O P1
D
G
S
O P1 O UT
R4
56kW
C 15
100mF
VEE
Fig.5 High Gain First Stage
Timing Diagram
RST
CDS
O u tp u t
E n a b le
C o m p a ra to r
In p u t
C o m p a ra to r
o u tp u t
D e te c t
E n a b le
T e s t E n a b le
p o w e r - o n d e la y tim e
40S
10S
te s t e n a b le
R E LA Y
5 sec
+ tr ig g e r le v e l
- tr ig g e r le v e l
< 2 4 m s > 2 4 m s (N o te 2 )
(N o te 1 )
ON
T R IA C
ON
p u ls e o u tp u t
(N o te 3 )
Note:
The output is activated if the trigger signal conforms to the following criteria:
· More than 3 triggers within 2 seconds
· A trigger signal sustain duration ³ 0.34 secs
· 2 trigger signals within 2 secs with one of the trigger signal sustain ³ 0.16 secs.
The effective comparator output width can be selected to be 24ms or 32ms or 48ms by mask option.
The default is 24ms (system frequency=16kHz).
The output duration is set by an external RC that is connected to the OSCD pin.
Rev. 1.30
7
October 12, 2009
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