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LP62S16128BV-I 查看數據表(PDF) - AMIC Technology

零件编号
产品描述 (功能)
比赛名单
LP62S16128BV-I
AMICC
AMIC Technology AMICC
LP62S16128BV-I Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LP62S16128B-I Series
AC Characteristics (TA = -40°C to +85°C, VCC = 2.7V to 3.6V)
Symbol
Parameter
LP62S16128B-55LLI LP62S16128B-70LLI
Unit
Min.
Max.
Min.
Max.
Read Cycle
tRC
Read Cycle Time
55
-
70
-
ns
tAA
Address Access Time
-
55
-
70
ns
tACE
Chip Enable Access Time
-
55
-
70
ns
tBE
Byte Enable Access Time
-
55
-
70
ns
tOE
Output Enable to Output Valid
-
25
-
35
ns
tCLZ
Chip Enable to Output in Low Z
10
-
10
-
ns
tBLZ
Byte Enable to Output in Low Z
10
-
10
-
ns
tOLZ
Output Enable to Output in Low Z
5
-
5
-
ns
tCHZ
Chip Disable to Output in High Z
-
20
-
25
ns
tBHZ
Byte Disable to Output in High Z
-
20
-
25
ns
tOHZ
Output Disable to Output in High Z
-
20
-
25
ns
tOH
Output Hold from Address Change
5
-
5
-
ns
Write Cycle
tWC
Write Cycle Time
55
-
70
-
ns
tCW
Chip Enable to End of Write
50
-
60
-
ns
tBW
Byte Enable to End of Write
50
-
60
-
ns
tAS
Address Setup Time
0
-
0
-
ns
tAW
Address Valid to End of Write
50
-
60
-
ns
tWP
Write Pulse Width
40
-
55
-
ns
tWR
Write Recovery Time
0
-
0
-
ns
tWHZ
Write to Output in High Z
-
25
-
25
ns
tDW
Data to Write Time Overlap
25
-
30
-
ns
tDH
Data Hold from Write Time
0
-
0
-
ns
tOW
Output Active from End of Write
5
-
5
-
ns
Note: tBLZ tOLZ tCHZ tBHZ and tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition
and are not referred to output voltage levels.
(June, 2004, Version 1.4)
6
AMIC Technology, Corp.

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